Structured ASICs: Opportunities and Challenges

There is currently a huge gap between the two main technologies used to implement custom digital integrated circuit (IC) designs. At one end of the spectrum are field programmable gate arrays (FPGAs). These devices have relatively low design costs and short design times, but they also have high per-unit costs and are limited in terms of design size, complexity, and performance. At the other end of the device continuum are application specific integrated circuits (ASICs). These components have exceedingly high design costs and take a long time to develop, but they can support extremely large, complex, and high-performance designs, and they have low perunit costs in large production runs. A new category of devices – known as structured ASICs – is now becoming available. These devices bridge the gap between FPGAs and ASICs in terms of cost and capabilities, but they also pose challenges to device manufacturers and design tool vendors.